1. Field of the Invention
The invention relates to computer systems utilizing cache memory systems, and more particularly to computer systems where certain ranges of main memory address are not cacheable.
2. Description of the Related Art
Computer system users are always requesting more powerful, faster computers. Just as this was true in large computer systems, it is also true in personal computers. For this reason faster processors and memories have continually been developed and utilized. The development of microprocessors has outstripped the development of affordable, equally fast memory devices. As a result, users are often cost limited as to the performance of the system. This problem was partially resolved by the use of cache memory systems, which use small amounts of faster, expensive memory and large amounts of slow, inexpensive memory. Portions of the data in the slow memory were copied into the fast memory, with a cache controller determining when the available information was in the fast memory, allowing a quicker cycle to be performed. Performance levels were improved while costs remain satisfactory.
However, personal computer systems are flexible units which can be configured in many different ways. For example, personal computers compatible with personal computers developed by International Business Machines Corp. (IBM) can have memory logically located in varying locations, depending on the specific design. Conventionally, certain portions of the memory have not been cacheable because devices share the memory, such as video display systems, the memory is read only (ROM), or the location is not readable and writable, such as device control registers. Thus, certain locations in the memory map must be indicated as noncacheable to any controller handling the cache system.
Because of the speeds of operation in cache systems, a signal indicating that a given memory area was noncacheable had to be produced very quickly. Thus, programmable array logic (PAL) devices were utilized to perform the decoding. However, as noted above, personal computers are very flexible systems which can be easily reorganized by users by the addition of individual circuit boards. These boards may change the cacheability of portions of the memory space of the computer system. But PAL's cannot be reconfigured by the user and so any PAL's utilized in the system were designed for the lowest common denominator or to certain specific implementations, with restrictions then placed on the added circuit boards. Different PAL's could be inserted, but this could not be done by unskilled users and increased complexity and inventory requirements and so could be used only for large users or large volume applications. This does not solve the problem for small users or special applications.